A planar field-effect transistor (FET) includes a substrate, a source region, a drain region, and a channel between the source and drain regions. The channel is disposed in the substrate. During operation, heat generated in the channel of the planar FET may dissipate through the substrate.
A vertical gate-all-around FET (VGAA FET) includes a substrate, a first source/drain (S/D) region that is disposed on the substrate, a second S/D region that is disposed above the first S/D region, a nanowire that is between the first and second S/D regions, and a gate stack that surrounds the nanowire. During operation, since the nanowire of the VGAA FET is disposed outside of the substrate, heat may not easily dissipate from the nanowire of the VGAA FET.
A FinFET includes a substrate, a fin, and a gate stack. The fin extends from the substrate, and includes a source region, a drain region, and a channel that is between the source and drain regions and that underlies the gate stack. During operation, since the fin of the FinFET is disposed outside of the substrate, heat may not easily dissipate from the fin of the FinFET.